1. Field of the Invention
The present invention generally relates to a semiconductor wafer on which plural semiconductor chips are arranged in a matrix manner, a semiconductor chip cut from the semiconductor wafer, and a method of manufacturing the semiconductor wafer.
2. Description of the Related Art
When a defect of a semiconductor chip is found after the semiconductor chip is mounted on a product and shipped to market, individual information, or so-called traceability of manufacturing information, of the defective chip becomes extremely important for analyzing the cause of the defect. The individual information includes what manufacturing process has been applied to the chip. To that end, various methods of providing the individual information regarding the manufacturing process (such as a lot number, a wafer number, a chip address) have been disclosed.
For example, according to a method disclosed in Japanese Patent Application Publication No. H4-111438, plural fuses are formed on a semiconductor chip (hereinafter may be abbreviated as “a chip”), and a prescribed fuse(s) among the formed fuses is cut so that the individual information of the manufacturing process can be indicated.
Further according to Japanese Patent Application Publication No. 2000-228341, a method of forming a pattern in a chip by using an exposure apparatus, a method of writing the individual information using a laser, and a method of supplying the individual information to a programmable random access memory (PROM) through the input terminal of the PROM are disclosed.
However, when the method of cutting the fuse(s) as disclosed in Japanese Patent Application Publication No. H4-111438 is used, an extra step of cutting the fuse(s) becomes necessary, thereby increasing the number of manufacturing steps.
On the other hand, when any of the methods disclosed in Japanese Patent Application Publication No. 2000-228341 is used, there is also a drawback. For example, when a different pattern is attempted to be formed on each of the chips using an exposure apparatus, the exposing process time may be greatly increased. Further, when information is attempted to be input to the chip by using a laser or through the input terminal of the PROM, an extra step of inputting the information becomes necessary, thereby increasing the number of manufacturing steps.
Further, when more and more items of the individual information such as the lot number, the wafer number, and positional information of the chip on the wafer surface become necessary for each semiconductor chip, the amount of information is accordingly increased and managing the information becomes more difficult. Further, recently and continuing to the present, the size of a semiconductor chip is becoming smaller and smaller and the amount of information indicating the relative position of the semiconductor chip with respect to the semiconductor wafer is increasing.
To obtain the positional information of a chip on a wafer surface, a method has been used in which a single mask pattern for the whole surface of the wafer is used. In this method, different patterns for each of the chips are included in the mask pattern, so that each chip has its separate positional information. However, soon, this method may not be good enough. This is because semiconductor chips have become more and more highly integrated and densely fabricated. As a result, a method is becoming more and more used in which a single mask pattern is repeatedly exposed in several shots on a wafer surface by scanning the exposure position, so that a pattern for the whole surface of the wafer is formed by the repeated exposure of the same mask pattern. Unfortunately, when this method is used, it is difficult to obtain accurate positional information of the chip on the wafer even if different patterns for each chip are formed on the single mask pattern.